Field of the Invention
Exemplary embodiments of the present invention relate to a thin film transistor array substrate and a manufacturing method thereof.
Description of the Related Art
A liquid crystal display (“LCD”) device has been adopted as one of the most widely used types of flat panel display (“FPD”) devices, typically including two substrates with electrodes, and a liquid crystal layer between the substrates. The substrates may adjust the amount of light passing through the liquid crystal layer by rearranging liquid crystal molecules in the liquid crystal layer using a voltage applied to the electrodes.
In general, an LCD device may include a thin-film transistor (“TFT”) for switching each pixel. The TFT may form a three-terminal switching device including a gate electrode to which a switching signal is applied, a source electrode to which a data signal is applied, and a drain electrode to output a data signal. The TFT may include active layers formed between the gate electrode and the source electrode and between the gate electrode and the drain electrode. In this example, amorphous silicon layers may mainly be used as the active layers included in the TFT. Along with the recent trend of larger, high-performance liquid crystal displays, oxide semiconductors have drawn attention as active layers for enhancing the performance of the TFTs.
The use of an oxide semiconductor layer as the active layer can meet high-performance display devices and can reduce capacitance between source/drain electrodes and a gate electrode.
When fabricating TFTs using an oxide semiconductor, however, an oxide semiconductor layer may deteriorate etching rate and/or deposition steps.
Moreover, resistive-capacitive (RC) delay is still becoming a critical problem caused by capacitance between the gate line and the data line and or between the storage line and the data line.
Accordingly, there is a need for an approach to make display devices and methods capable of preventing the capacitance between the gate line and the data line and or between the storage line and the data line while preventing deterioration of the oxide semiconductor layer in the course of manufacture of the TFT array substrate.